In the development of modern semiconductor devices, the requirements for ever increasing device density and ever decreasing device dimensions are frequently encountered. As a result, requirements for the packaging and interconnection of devices become more stringent. The technology of flip-chip bonding or flip-chip direct chip attachment (DCA) have been developed to satisfy such stringent requirements in semiconductor packaging.
In the technology of flip-chip bonding, a multiplicity of bumps is normally formed on the active surface of a wafer. The multiplicity of bumps is formed on top of a multiplicity of input/output bond pads in order to provide the function for electrical input and electrical output. Conventionally, the multiplicity of bumps is formed by a solder material such as lead-tin solder. The flip-chip bumping technology has been broadly used to replace the out-dated lead-frame technology for connecting a semiconductor device to a printed circuit board. The flip-chip technology provides the benefit of reducing the signal transmission distance between a semiconductor device and a circuit board and therefore, is especially suitable for packaging high speed semiconductor elements.
In the conventional flip-chip technology, the bumps are formed in the shape of a ball due to the surface tension of the solder material. As a result, a minimal distance between the input/output pads on the wafer must be maintained in order to avoid any possible occurrence of electrical short in-between neighboring bumps due to physical contact. For instance, when a conventional wire bonding technique is used for interconnecting a semiconductor device to a circuit board, the minimal distance between the input/output pads is about 75–100 microns. However, when the flip-chip technology is used for interconnecting a semiconductor device to a circuit board, the minimal distance between the input/output pads is increased to at least 150 microns in order to ensure the reliability of the device.
With the recent advancement in semiconductor technology, semiconductor wafers have been developed to produce chips having multiple functions. The very nature of the multiple-functioned chips require a larger number of input/output pads on the wafer surface. Since the total area of the wafer is limited (or fixed), the increasing number of input/output pads necessarily requires a smaller distance between the pads to be maintained in order to accommodate the larger number of pads. When the flip-chip technology is utilized in providing the interconnection, and while the distance between neighboring input/output pads must be reduced, a logical solution is to carefully select the bump material in order to either make smaller bumps or to reduce the bump-to-bump distance.
Carbon nanotubes have been used recently for providing electrical connections between semiconductor devices and a substrate board based on its inherent properties as both a semi-conducting body and an electrical conducting body. In order to utilize carbon nanotubes for electrical interconnection in flip-chip bonding, the carbon nanotubes are normally formed by a chemical vapor deposition technique conducted in a suitable electrical field. The electrical field induces a growth of the carbon nanotubes from an input/output pad either horizontally or vertically. However, the lowest possible operating temperature for the chemical vapor deposition process is about 700° C., which may damage the devices formed on the wafer. The conventional CVD method for forming carbon nanotubes is therefore not suitable for forming conductive bumps on wafers. Other reaction methods utilizing a direct interaction between metal-carbide which also requires high temperature and is similarly undesirable. Still other reaction methods utilizing arc discharge or laser ablation on graphite obtaining free-standing carbon nanotubes that need a high temperature metal-carbide reaction to fix the carbon nanotubes on metal I/O pad.
It is therefore an object of the present invention to provide nanometer conductive bumps that do not have the drawbacks or shortcomings of conventional conductive bumps.
It is another object of the present invention to provide nanometer conductive bumps for use in a flip-chip bonding technology.
It is a further object of the present invention to provide nanometer conductive bumps that are formed by carbon nanotubes.
It is another further object of the present invention to provide self-assembled nanometer conductive bumps that can be formed by a self-assembly method.
It is still another object of the present invention to provide a method for fabricating self-assembled nanometer conductive bumps with carbon nanotubes.
It is yet another object of the present invention to provide a method for fabricating self-assembled nanometer conductive bumps by first coating carbon nanotubes with chemical functional groups.